FPGA Hardware in the Loop Validation of Torque and Flux Estimators for Direct Torque Control (DTC) of an Induction Motor (IM)

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Date

2022

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Université de M'sila

Abstract

This article provides a hardware implementation of torque and flux estimators for direct torque control (DTC) of an induction motor (IM) on the Field Programmable Gate Array (FPGA). Due to its high processing frequency, the FPGA circuit presents an alternative strategy for achieving a high performance DTC implementation. This cannot be achieved by Digital Signal Processing (DSP) or Microcontroller application. Optimized hardware architecture is also proposed for implementation of a complete estimator with explicit determination of all the quantities such as the flux phase, the flux amplitude and the torque amplitude. This work presents a precise hardware estimator of the torque and the flux, it developed with negligible estimation error (0.0002 [Wb] RMS estimate error for the stator flux and 0.0005 [Nm] RMS estimate error the torque), in addition to that this estimator is implemented on the Virtex-4 FPGA board with minimal resources(less 5% of slices registers, 5% of DSP48Es and around 17% of LUTS). This estimator is developed and synthesized independently of the command and can be reused for any task which requires the estimation of these quantities. After this the estimator was used to complete a DTC control in a hardware co-simulation procedure with the Xilinx system generator and MATLAB/SIMULINK tools on the Xilinx ML402 development kit.

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Keywords

FPGA, Hardware co-simulation, Xilinx generator system, Induction motor control, Flux and torque estimation.

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